RFR: 8351101: RISC-V: C2: Small improvement to MacroAssembler::revb [v2]

[Fei Yang]

> Hi, please review this small improvement.
> After logic shift right 56 bits, there is no need to zero extend the remaining 8-bit value.
> The reason is that the upper bits will be all zeros as this is a logic shift right.
> Testing: `hotspot:tier1` is clean on linux-riscv64 platform with this change.

Fei Yang has updated the pull request with a new target base due to a merge or a rebase. The incremental webrev excludes the unrelated changes brought in by the merge/rebase. The pull request contains two additional commits since the last revision:

 - Merge branch 'master' into JDK-8351101
 - 8351101: RISC-V: C2: Small improvement to MacroAssembler::revb

-------------

Changes:
  - all: https://git.openjdk.org/jdk/pull/23879/files
  - new: https://git.openjdk.org/jdk/pull/23879/files/eb7a9402..8f211b9d

Webrevs:
 - full: https://webrevs.openjdk.org/?repo=jdk&pr=23879&range=01
 - incr: https://webrevs.openjdk.org/?repo=jdk&pr=23879&range=00-01

  Stats: 5997 lines in 110 files changed: 4079 ins; 983 del; 935 mod
  Patch: https://git.openjdk.org/jdk/pull/23879.diff
  Fetch: git fetch https://git.openjdk.org/jdk.git pull/23879/head:pull/23879

PR: https://git.openjdk.org/jdk/pull/23879