Integrated: 8351101: RISC-V: C2: Small improvement to MacroAssembler::revb

[Fei Yang]

On Tue, 4 Mar 2025 01:28:32 GMT, Fei Yang <fyang at openjdk.org> wrote:

> Hi, please review this small improvement.
> After logic shift right 56 bits, there is no need to zero extend the remaining 8-bit value.
> The reason is that the upper bits will be all zeros as this is a logic shift right.
> Testing: `hotspot:tier1` is clean on linux-riscv64 platform with this change.

This pull request has now been integrated.

Changeset: b1a21b56
Author:    Fei Yang <fyang at openjdk.org>
URL:       https://git.openjdk.org/jdk/commit/b1a21b563e3ae13fa5c409a4f0c04686c3f5b34a
Stats:     1 line in 1 file changed: 0 ins; 1 del; 0 mod

8351101: RISC-V: C2: Small improvement to MacroAssembler::revb

Reviewed-by: fjiang, mli

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PR: https://git.openjdk.org/jdk/pull/23879