RFR: 8345298: RISC-V: Add riscv backend for Float16 operations - scalar [v5]

[Fei Yang]

On Mon, 10 Mar 2025 17:22:06 GMT, Hamlin Li <mli at openjdk.org> wrote:

>> src/hotspot/cpu/riscv/riscv.ad line 8324:
>> 
>>> 8322: %}
>>> 8323: 
>>> 8324: instruct min_max_HF_reg(fRegF dst, fRegF src1, fRegF src2)
>> 
>> It will be easier for people to map to exitsting F/D variants if we use similar names like `sqrtHF_reg`, `minHF_reg_reg`, `maxHF_reg_reg`, `maddHF_reg_reg`, and `binOpsHF_reg_reg` for the the HF variant.
>
> I think there is no convention of instruct naming, as long as there is no duplicate names, and normally we don't care about the instruct name too much. What really matters is the match rule, e.g. MinHF/ManHF and so on, which indicates what the instructs do.

Yes, it won't affect functionality here. The instruct naming matters when we want some fine-grained tunnings (minI_reg_reg/minI_reg_zero). That said, it doesn't seem that it could happen for this HF part? So OK!

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PR Review Comment: https://git.openjdk.org/jdk/pull/23844#discussion_r1988215397