RFR: 8356159: RISC-V: Add Zabha [v5]

[Fei Yang]

On Mon, 26 May 2025 08:29:53 GMT, Robbin Ehn <rehn at openjdk.org> wrote:

>> src/hotspot/cpu/riscv/riscv.ad line 5623:
>> 
>>> 5621: %}
>>> 5622: 
>>> 5623: instruct compareAndExchangeB(iRegINoSp res, indirect mem, iRegI_R12 oldval, iRegI_R13 newval, rFlagsReg cr)
>> 
>> Similar here. No need to make `oldval` or `newval` fixed registers for `compareAndExchangeB`, `compareAndExchangeS`, `compareAndExchangeBAcq` or `compareAndExchangeSAcq`. And we should also remove `cr` which is not used.
>
> Good find, thank you!

Seems the Acq variants is missed? I see `compareAndSwapBAcq`, `compareAndSwapSAcq`, `compareAndExchangeBAcq` and `compareAndExchangeSAcq` still uses fixed registers for oldval and newval.

-------------

PR Review Comment: https://git.openjdk.org/jdk/pull/25252#discussion_r2107177188