RFR: 8369616: JavaFrameAnchor on RISC-V has unnecessary barriers and wrong store order in MacroAssembler

[Ludovic Henry]

On Sat, 11 Oct 2025 12:48:46 GMT, Feilong Jiang <fjiang at openjdk.org> wrote:

> Same as [JDK-8369190](https://bugs.openjdk.org/browse/JDK-8369190), but for the RISC-V port.
> 
> Testing:
> - [x] tier1-3

src/hotspot/cpu/riscv/javaFrameAnchor_riscv.hpp line 43:

> 41:   void clear(void) {
> 42:     // No hardware barriers are necessary. All members are volatile and the profiler
> 43:     // is run from a signal handler and only observers the thread its running on.

Suggestion:

    // is run from a signal handler and the only observer is the thread its running on.

src/hotspot/cpu/riscv/javaFrameAnchor_riscv.hpp line 53:

> 51:   void copy(JavaFrameAnchor* src) {
> 52:     // No hardware barriers are necessary. All members are volatile and the profiler
> 53:     // is run from a signal handler and only observers the thread its running on.

Suggestion:

    // is run from a signal handler and the only observer is the thread its running on.

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PR Review Comment: https://git.openjdk.org/jdk/pull/27757#discussion_r2425469047
PR Review Comment: https://git.openjdk.org/jdk/pull/27757#discussion_r2425469514