RFR: 8367692: RISC-V: Align post call nop [v5]

[Hamlin Li]

On Thu, 25 Sep 2025 12:44:01 GMT, Robbin Ehn <rehn at openjdk.org> wrote:

>> Hi please, consider.
>> 
>> As ziccif require instructions to natural aligned to be atomic the 4 byte post call nop must be aligned.
>> But I don't want to add a c.nop(2b) to align the nop(4b) which means the jal(r) must also be algined.
>> As we have no utility to aligned the end of an instruction sequence the call it self is aligned and uses only 4 byte instructions. Only in the case where we could use an two c-instruction we may loose space.
>> 
>> Thanks, Robbin
>
> Robbin Ehn has updated the pull request incrementally with one additional commit since the last revision:
> 
>   Use relocation spec as marker.

There is an assert here: https://github.com/openjdk/jdk/blob/master/src/hotspot/cpu/riscv/macroAssembler_riscv.cpp#L4998

  if (entry.rspec().type() != relocInfo::runtime_call_type) {
    assert_alignment(call_pc);
  }

It's only asserted if it's not `runtime_call_type`, should this condition be adjusted/removed?

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PR Comment: https://git.openjdk.org/jdk/pull/27467#issuecomment-3338741225