RFR: 8378675: PPC64: increase instruction cache line size [v3]

[Richard Reingruber]

On Thu, 26 Feb 2026 13:23:04 GMT, David Briemann <dbriemann at openjdk.org> wrote:

>> Set the instruction cache line size for Power to 128 bytes.
>> 
>> Add functions to retrieve the data cache line size and instruction cache line size from the system (AIX & Linux).
>
> David Briemann has updated the pull request incrementally with one additional commit since the last revision:
> 
>   remove comments, fix comparison

src/hotspot/cpu/ppc/vm_version_ppc.cpp line 535:

> 533:   _L1_data_cache_line_size = os::get_dcache_line_size();
> 534:   assert(_L1_data_cache_line_size >= DEFAULT_CACHE_LINE_SIZE,
> 535:          "processors with smaller cache line size are no longer supported");

It worries me a little bit that if `_L1_data_cache_line_size` is too big then `MacroAssembler::clear_memory_doubleword()` can fail to clear all bytes.
I guess I shouldn't be that paranoid.

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PR Review Comment: https://git.openjdk.org/jdk/pull/29918#discussion_r2864364221