Seeing error in one test on ARM: org.openjdk.jcstress.tests.volatiles.ReadTwiceOverVolatileReadTest

[Aleksey Shipilev]

On 02/23/2017 07:52 PM, White, Derek wrote:
> 1) One explanation for this is that the load of w12 completed out-of-order 
> before the load of w10, so it saw the initial order. But this seems to 
> violate the requirement that: " Two reads to the same address by the same 
> observer are observed in program order by all observers within the
> shareability domain of the memory address being accessed." B2.7.2, ARM ARM
> v8. This requirement is independent of the LDAR of w11.

Yes, that's "coherence": a single modification order for a particular location.

> 2) The LDAR adds the additional requirement (paraphrased by cancelling out 
> text of shareability domains): "For a Load-Acquire, observers observe 
> accesses in the following order: 1. The read caused by the Load-Acquire. 2. 
> Reads and writes caused by loads and stores that appear in program order 
> after the Load-Acquire requires that the observer observes the access." 
> B2.7.3.

> There is so much verbiage in the original text, but this seems to imply that 
> the load into w12 can't move above the ldar of w11. But this restriction by 
> itself doesn't prevent an earlier load being delayed after the ldar. So if 
> the 1st and 3rd  loads had different source virtual addresses then the load 
> of w10 could have been delayed after the load of w12.

Yes. Where coherence comes into play again.

Thanks,
-Aleksey