Seeing error in one test on ARM: org.openjdk.jcstress.tests.volatiles.ReadTwiceOverVolatileReadTest

[Aleksey Shipilev]

On 02/24/2017 07:13 PM, White, Derek wrote:
> I think this means that this statement is true for ARM (although not JMM):
> - Given that one (and only one) core is incrementing a memory location, with or without memory barriers or atomic instructions,
> - Another core reading that same memory location (with or without memory barriers, etc), will never see writes out of order. 
> 	- It may never see ANY writes, absent memory barriers, etc.
> 	- It might never see various intermediate values. 
> 	- But a read later in program order should not see a value lower than a read earlier in program order.
> - And the preceding is true for multiple cores reading that same memory location.
> 	- Noting that there are no restrictions between the reads from different cores, only the reads within each core.
> - And by "core" I mean "observer", "processing element", or abstraction of your choice.
> 
> Does this seem correct?

Yes.

> You might be able to foresee a test case in the future...

That's what new coherence tests are asserting. It's going to be hard to assert
the increments monotonicity, because jcstress outcomes are not DSL-y enough to
capture predicates like that. But what we have now is a reasonable approximation.

By the way, I ran them on our Cavium box with current jdk9, and it came clean,
no issues.

Thanks,
-Aleksey