[jdk21u] RFR: 8320280: RISC-V: Avoid passing t0 as temp register to MacroAssembler::lightweight_lock/unlock

Fri Nov 24 02:27:28 UTC 2023

Clean backport which fixes a potential risk for passing t0 as temporary register to MacroAssembler::lightweight_lock/unlock. This is a riscv-specific change, risk is low.

### Testing:
- [x]  Run tier1-3 tests with qemu 8.1.50 (default locking mode) (release)

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Commit messages:
 - Backport a6098e438d7c5aa458b37bf94a9cfe706da35d52

Changes: https://git.openjdk.org/jdk21u/pull/399/files
 Webrev: https://webrevs.openjdk.org/?repo=jdk21u&pr=399&range=00
  Issue: https://bugs.openjdk.org/browse/JDK-8320280
  Stats: 52 lines in 10 files changed: 9 ins; 0 del; 43 mod
  Patch: https://git.openjdk.org/jdk21u/pull/399.diff
  Fetch: git fetch https://git.openjdk.org/jdk21u.git pull/399/head:pull/399

PR: https://git.openjdk.org/jdk21u/pull/399