RFR: RISC-V: Avoid return misprediction

[Fei Yang]

This is a small enhancement for the loom riscv-specifc changes. This fixes a return misprediction performance issue which was recently discovered. See https://github.com/openjdk/jdk/pull/21406 for more details. It simply changes usage of scratch registers prefering `t1` instead of `t0` for jumps and calls, which should not affect basic functionality. This also reverted an unnecessary change previously made in two files  `src/hotspot/cpu/riscv/c2_CodeStubs_riscv.cpp` and `src/hotspot/cpu/riscv/templateTable_riscv.cpp`.

Testing performed on linux-riscv64:
- [x] make test TEST="hotspot_loom jdk_loom" (release build)
- [x] make test TEST="hotspot_loom jdk_loom" TEST_VM_OPTS="-XX:+VerifyStack -XX:+VerifyContinuations" (fastdebug build)

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Commit messages:
 - RISC-V: Avoid return misprediction

Changes: https://git.openjdk.org/loom/pull/215/files
  Webrev: https://webrevs.openjdk.org/?repo=loom&pr=215&range=00
  Stats: 14 lines in 5 files changed: 2 ins; 1 del; 11 mod
  Patch: https://git.openjdk.org/loom/pull/215.diff
  Fetch: git fetch https://git.openjdk.org/loom.git pull/215/head:pull/215

PR: https://git.openjdk.org/loom/pull/215