[vectorIntrinsics] RFR: 8261108: Add cast nodes from integer types to float types implementation for Arm SVE [v2]

[Wang Huang]

On Fri, 19 Feb 2021 08:34:27 GMT, Ningsheng Jian <njian at openjdk.org> wrote:

>> Wang Huang has updated the pull request incrementally with one additional commit since the last revision:
>> 
>>   fix some bugs
>
> src/hotspot/cpu/aarch64/assembler_aarch64.hpp line 3371:
> 
>> 3369:     } else if (T_dst == D && T_src == S) {
>> 3370:       T_dst = D;
>> 3371:       T_src = B;
> 
> This looks confusing. I understand that it's just 0b00, but using B here is really confusing. Maybe using 0b00 and 0b11 directly to align with Arm ARM opc/opc2?

Arm uses confusing encoding . If we use 0b00 / 0b11 ,  we can not get a concise macroassmbler here ( for example. other developers can not use this macro). In fact, `gcc` uses switch..case to convert macro assmbler into Arm's funny encoding.

> src/hotspot/cpu/aarch64/assembler_aarch64.hpp line 3385:
> 
>> 3383:     pgrf(Pg, 10), rf(Zn, 5), rf(Zd, 0);                                 \
>> 3384:     encode_cvtf_T(T_dst, T_src);                                        \
>> 3385:     f(T_dst, 23, 22), f(T_src, 18, 17);                                 \
> 
> I would suggest to fill the bits in order, i.e. move f(T_dst, 23, 22) right after (... 31, 24), and then (21, 19), (18, 17)...

`T_dst` and `T_src` will be changed after  `encode_cvtf_T`, so they cannot move there.

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PR: https://git.openjdk.java.net/panama-vector/pull/37