[vectorIntrinsics+mask] RFR: 8274236: Cleanups related to X86 masking support.

[Sandhya Viswanathan]

On Thu, 23 Sep 2021 20:14:32 GMT, Jatin Bhateja <jbhateja at openjdk.org> wrote:

> - Re-factor and cleanup existing VectorLoadMask, VectorStoreMask and CICS patterns (one source is memory operand).

src/hotspot/cpu/x86/x86.ad line 1498:

> 1496:     case Op_VectorStoreMask:
> 1497:     case Op_VectorBlend:
> 1498:       if (UseSSE < 3) {

This doesnt look correct. packusdw needs SSE4.  Also all the others in this case block need SSE4.

src/hotspot/cpu/x86/x86.ad line 7925:

> 7923:   predicate(Matcher::vector_length(n) <= 16 && n->in(1)->bottom_type()->isa_vectmask() == NULL);
> 7924:   match(Set dst (VectorStoreMask src size));
> 7925:   effect(TEMP_DEF dst);

The original storeMask2B didn't need TEMP dst and so was a separate rule.

src/hotspot/cpu/x86/x86.ad line 7948:

> 7946:   match(Set dst (VectorStoreMask src size));
> 7947:   format %{ "vector_store_mask $dst, $src \t! elem size is $size byte[s]" %}
> 7948:   effect(TEMP_DEF dst);

The original storeMask4B didn't need TEMP dst and so was a separate rule.

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PR: https://git.openjdk.java.net/panama-vector/pull/131