[vectorIntrinsics] RFR: 8283413: Add C2 mid-end and x86 back-end implementation for bit REVERSE and REVERSE_BYTES operation [v3]

[Jatin Bhateja]

On Thu, 24 Mar 2022 08:26:58 GMT, Quan Anh Mai <duke at openjdk.java.net> wrote:

>> Jatin Bhateja has updated the pull request with a new target base due to a merge or a rebase. The pull request now contains five commits:
>> 
>>  - 8283413: White space removal.
>>  - 8283413: Review comments resoultion, ReverseBytes IR and x86 backend support.
>>  - Merge branch 'vectorIntrinsics' of http://github.com/openjdk/panama-vector into JDK-8283413
>>  - 8283413: Adding Ideal transform for (ReverseV (ReverseV VEC)) => VEC and (ReverseV (ReverseV VEC MASK) MASK)) => VEC
>>  - 8283413: Add C2 mid-end and x86 back-end implementation for bit REVERSE operation
>
> src/hotspot/cpu/x86/c2_MacroAssembler_x86.cpp line 4535:
> 
>> 4533: void C2_MacroAssembler::vector_reverse_bit(BasicType bt, XMMRegister dst, XMMRegister src, XMMRegister xtmp1,
>> 4534:                                            XMMRegister xtmp2, XMMRegister xtmp3, Register rtmp, int vec_enc) {
>> 4535:   if (VM_Version::supports_avx512bw()) {
> 
> `VM_Version::supports_avx512bw() && (VM_Version::supports_avx512vl() || vec_enc == AVX_512bit)`

VPSHUFB used here needs AVX512VLBW feature in-order to operate over 128/256/512 bit vector. Thus for an EVEX encoded instruction limiting feature here is AVX512VLBW.

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PR: https://git.openjdk.java.net/panama-vector/pull/182