[vectorIntrinsics+fp16] RFR: 8305563: [vectorapi]: Initial aarch64 backend implementation for FP16 operations

[Andrew Haley]

On Mon, 26 Jun 2023 12:34:12 GMT, Bhavana Kilambi <bkilambi at openjdk.org> wrote:

> This patch adds aarch64 (Neon and SVE) backend implementation for the following FP16 operations for which C2 support was added in the commit https://github.com/openjdk/panama-vector/commit/7460d9327aac7d1d2ba6aed4e7137a417dbf6a97 -
> 
> Unary operations : AbsVHF, NegVHF
> Binary operations : AddVHF, SubVHF, MulVHF, DivVHF
> Ternary operations : AddReductionVHF, FmaVHF
> Conversion operations : VectorCastHF2D, VectorCastD2HF
> 
> Some of these operations on Neon machines, require features "fphp" and "asimdhp" to be available. Feature detection for these features have also been added.

This all looks reasonable enough, except for a couple of minor niggles.

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PR Review: https://git.openjdk.org/panama-vector/pull/217#pullrequestreview-1498567174