[vectorIntrinsics+fp16] RFR: 8365967: C2 compiler support for HalffloatVector operations supported by auto-vectorization flow

[Jatin Bhateja]

Hi All,

This patch extends VectorAPI inline expanders to infer Float16 vector IR based on the newly passed operType argument.
We intend to leverage the existing IR and backend implementation of auto-vectorized Float16 operations. 
Various HalffloatVector operators, namely ADD, SUB, MUL, DIV, MAX, MIN, and FMA, now emit FP16 ISA on x86 targets supporting AVX512-FP16 feature and AArch64 SVE targets.

Please note that the patch targets **vectorIntrinsics+fp16** branch and is based on top of https://github.com/openjdk/panama-vector/pull/230

What is remaining?
- Functional validation
-  Performance validation
-  New IR framework-based tests.
- Microbenchmark for FP16-based dotproduct.

Best Regards,
Jatin

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Commit messages:
 - Merge branch 'vectorIntrinsics+fp16' of http://github.com/openjdk/panama-vector into JDK-8365967
 - 8365967: C2 compiler support for HalffloatVector operations suppored by auto-vectorization flow

Changes: https://git.openjdk.org/panama-vector/pull/231/files
  Webrev: https://webrevs.openjdk.org/?repo=panama-vector&pr=231&range=00
  Issue: https://bugs.openjdk.org/browse/JDK-8365967
  Stats: 39 lines in 3 files changed: 27 ins; 2 del; 10 mod
  Patch: https://git.openjdk.org/panama-vector/pull/231.diff
  Fetch: git fetch https://git.openjdk.org/panama-vector.git pull/231/head:pull/231

PR: https://git.openjdk.org/panama-vector/pull/231