[riscv-port] RFR: 8278337: riscv: remove unnecessary ld/sd zr around calls [v2]

[Fei Yang]

On Wed, 8 Dec 2021 06:43:31 GMT, kuaiwei <duke at openjdk.java.net> wrote:

>> It seems zr(x0) is used as stack alignment when saving/restoring registers around calls. But it's unnecessary to ld/st x0 from/to stack. We just need reserve a stack slot in case alignment is required.
>
> kuaiwei has refreshed the contents of this pull request, and previous commits have been removed. The incremental views will show differences compared to the previous content of the PR. The pull request contains one new commit since the last revision:
>
>   8278337: riscv: remove unnecessary ld/sd zr around call

Changes requested by fyang (Lead).

src/hotspot/cpu/riscv/macroAssembler_riscv.cpp line 958:

> 956:   int count = 0;
> 957:   // Zr and sp (x0, x2) should not be pushed
> 958:   assert((bitset & 0b101) == 0, "zr or sp is in bitset: %x", bitset);

I don't think we need this assertion here. Function bitset_to_regs should not care about specific registers in the set.

src/hotspot/cpu/riscv/macroAssembler_riscv.cpp line 983:

> 981:   }
> 982:   for (int i = count - 1; i >= 0; i--) {
> 983:     sd(as_Register(regs[i]), Address(stack, (count -1 - i) * wordSize + offset));

whitespace is missing here. Should be: (count - 1 - i)

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PR: https://git.openjdk.java.net/riscv-port/pull/25