[riscv-port] Integrated: 8278833: riscv: Remove the x3 and x4 register saving logic in register savers

[Xiaolin Zheng]

On Wed, 15 Dec 2021 02:59:37 GMT, Xiaolin Zheng <xlinzheng at openjdk.org> wrote:

> Hi team,
> 
> x3 is the global pointer register used to reference global variables in C++ code, generated by linker; and x4 is the thread pointer register and would be modified by the kernel. In the riscv-port repo, we have no other modifications for the x3 & x4 registers so I would recommend removing the x3 & x4 saving logic in register savers. Previously verified along with other patches under full tiers jdk/hotspot on boards, and verified a simple `test/jtreg/hotspot/compiler` after fixing conflicts with [JDK-8278337](https://github.com/openjdk/riscv-port/pull/25).
> 
> BTW since we remove both two registers together, sp remains 16-byte aligned without other changes in stack frames.
> 
> Thanks,
> Xiaolin

This pull request has now been integrated.

Changeset: 77902053
Author:    Xiaolin Zheng <xlinzheng at openjdk.org>
Committer: Fei Yang <fyang at openjdk.org>
URL:       https://git.openjdk.java.net/riscv-port/commit/7790205306d21cfe080ed057ee07ccf98c86c87e
Stats:     40 lines in 3 files changed: 5 ins; 3 del; 32 mod

8278833: riscv: Remove the x3 and x4 register saving logic in register savers

Reviewed-by: yadongwang, fjiang, fyang

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PR: https://git.openjdk.java.net/riscv-port/pull/31