[riscv-port] RFR: 8277440: riscv: Move UseVExt from product to experimental

[Yanhong Zhu]

Currently, riscv port supports vector operations which is fully compatible with vector extension 1.0 spec. And we have passed tier 1-4 tests with option "-XX:+UseVExt" with QEMU.

Due to lack of native environment which supports vector extension 1.0, we cannot carry out tests for vector operations on real hardware. So we decided to move port-specific option UseVExt from product to experimental for now, and rename UseVExt to UseRVV.

This also fixes some typos in comments, and  removes unused v extension instructions.

The test results on HiFive Unleashed board (rv64imafdc) and NeZha D1 board (rv64imafdcvu) are in line with expectations.

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Commit messages:
 - 8277440: riscv: Move UseVExt from product to experimental

Changes: https://git.openjdk.java.net/riscv-port/pull/11/files
 Webrev: https://webrevs.openjdk.java.net/?repo=riscv-port&pr=11&range=00
  Issue: https://bugs.openjdk.java.net/browse/JDK-8277440
  Stats: 440 lines in 18 files changed: 12 ins; 333 del; 95 mod
  Patch: https://git.openjdk.java.net/riscv-port/pull/11.diff
  Fetch: git fetch https://git.openjdk.java.net/riscv-port pull/11/head:pull/11

PR: https://git.openjdk.java.net/riscv-port/pull/11