[riscv-port] RFR: 8277440: riscv: Move UseVExt from product to experimental

[Yadong Wang]

On Fri, 19 Nov 2021 08:51:49 GMT, Yanhong Zhu <yzhu at openjdk.org> wrote:

>> src/hotspot/cpu/riscv/globals_riscv.hpp line 91:
>> 
>>> 89:           "Extend i for r and o for w in the pred/succ flags of fence;"          \
>>> 90:           "Extend fence.i to fence.i + fence.")                                  \
>>> 91:   product(bool, UseRVV, false, "Use RVV instructions")                           \
>> 
>> Is RVV still a product flag?
>
>> Is RVV still a product flag?
> 
> UseRVV is only available as experimental option on this platform. It must be enabled via -XX:+UnlockExperimentalVMOptions flag.

It's better to write like this:

  product(bool, UseRTMForStackLocks, false, EXPERIMENTAL,                   \
          "Enable RTM lock eliding for stack locks in compiled code")       \

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PR: https://git.openjdk.java.net/riscv-port/pull/11