[riscv-port] Integrated: 8277440: riscv: Move UseVExt from product to experimental
yzhu at openjdk.java.net
Fri Nov 19 11:00:11 UTC 2021
On Fri, 19 Nov 2021 08:36:31 GMT, Yanhong Zhu <yzhu at openjdk.org> wrote:
> Currently, riscv port supports vector operations which is fully compatible with vector extension 1.0 spec. And we have passed tier 1-4 tests with option "-XX:+UseVExt" with QEMU.
> Due to lack of native environment which supports vector extension 1.0, we cannot carry out tests for vector operations on real hardware. So we decided to move port-specific option UseVExt from product to experimental for now, and rename UseVExt to UseRVV.
> This also fixes some typos in comments, and removes unused v extension instructions.
> The test results on HiFive Unleashed board (rv64imafdc) and NeZha D1 board (rv64imafdcvu) are in line with expectations.
This pull request has now been integrated.
Author: Yanhong Zhu <yzhu at openjdk.org>
Committer: Fei Yang <fyang at openjdk.org>
Stats: 436 lines in 18 files changed: 8 ins; 333 del; 95 mod
8277440: riscv: Move UseVExt from product to experimental
Reviewed-by: yadongwang, fyang
More information about the riscv-port-dev