CompareAndSet fails intermittently for riscv

[Aleksey Shipilev]

On 8/17/22 04:11, yangfei at iscas.ac.cn wrote:
> I suspect another jtreg test: test/jdk/java/util/concurrent/atomic/Serial.java also have the same issue.
> I once reduced this test into [1] and it looks that this will always fail on my unmatched board.
> But it passes if we disable the intrinsic like:
>      $ java -XX:+UnlockDiagnosticVMOptions -XX:DisableIntrinsic=_weakCompareAndSetLongRelease Serial
Whoa, I missed this. This is actually the test bug that manifests on single-threaded RISC-V :P
   https://mail.openjdk.org/pipermail/riscv-port-dev/2022-August/000594.html

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Thanks,
-Aleksey