[riscv-port] RFR: 8281731: riscv: Refactor instruction extraction code in nativeInst_riscv.h/cpp

[Fei Yang]

On Mon, 14 Feb 2022 10:29:13 GMT, Xiaolin Zheng <xlinzheng at openjdk.org> wrote:

> Hi team,
> 
> Could I have a review of this patch - this is just a trivial refactoring with some cleanups for `nativeInst_riscv.h/cpp` using `Assembler::extract()` with raw bits, by adding `extract_rs1`, `extract_rs2`, `extract_rd`, `extract_opcode`, and `extract_funct3` to make the code cleaner and conciser. Tested hotspot tier1 on Qemu with no other errors found.
> 
> Thanks,
> Xiaolin

src/hotspot/cpu/riscv/nativeInst_riscv.cpp line 88:

> 86: 
> 87: bool NativeInstruction::is_movptr_at(address instr) {
> 88:   address pos = instr;

Why introduce another local "pos" here? We could use input param "instr" directly.

src/hotspot/cpu/riscv/nativeInst_riscv.hpp line 107:

> 105:     address slli2 = addi2 + instruction_size;
> 106:     address last_instr = slli2 + instruction_size;
> 107:     return extract_rs1(addi1) == extract_rd(lui) &&

We are extracting the same thing more than once here and other places, which I think could be optimized.

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PR: https://git.openjdk.java.net/riscv-port/pull/57