[riscv-port] RFR: 8279565: riscv: RVB: Add byte reverse instruction [v3]
Feilong Jiang
fjiang at openjdk.java.net
Fri Jan 7 06:14:13 UTC 2022
> This PR has the following changes:
> 1. Implement byte-reverse instruction `rev8` of RISC-V BitManipulation Extension.
> 2. Code improvement of existing byte reverse methods.
> 3. Merge assembler_riscv_b.hpp and assembler_riscv_v.hpp into assembler_riscv.hpp
>
> Renaming of byte reverse methods is based on BitManipulation v0.93 [[1]], which provides `rev8.h`, `rev8.w` and `rev8` to reverse bytes in halfwords, words, and doubleword respectively. However, there are still some byte reverse operations that are not covered by spec, for example, "reverse bytes in halfword in lower 16 bits and sign extend". Base on the existing instructions naming style, we use `rev8.h.h` to represent it.
>
> New C2 instructions under riscv_b.ad are covered by the following JTREG tests:
> - test/hotspot/jtreg/compiler/codegen/Test6431242.java
> - test/hotspot/jtreg/compiler/c2/TestCharShortByteSwap.java
>
> Hotspot and jdk tier1 tests on QEMU (with and without UseRVB) are passed without new failures.
>
> [1]: https://github.com/riscv/riscv-bitmanip/releases/download/v0.93/bitmanip-0.93.pdf
Feilong Jiang has updated the pull request with a new target base due to a merge or a rebase. The pull request now contains one commit:
8279565: riscv: RVB: Add byte reverse instruction
-------------
Changes: https://git.openjdk.java.net/riscv-port/pull/42/files
Webrev: https://webrevs.openjdk.java.net/?repo=riscv-port&pr=42&range=02
Stats: 1845 lines in 10 files changed: 877 ins; 865 del; 103 mod
Patch: https://git.openjdk.java.net/riscv-port/pull/42.diff
Fetch: git fetch https://git.openjdk.java.net/riscv-port pull/42/head:pull/42
PR: https://git.openjdk.java.net/riscv-port/pull/42
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