[riscv-port-jdk17u:riscv-port] RFR: 8305728: RISC-V: Use bexti instruction to do single-bit testing

[Dingli Zhang]

On Fri, 2 Jun 2023 02:12:05 GMT, Fei Yang <fyang at openjdk.org> wrote:

>> Hi, please review this backport to riscv-port-jdk17u.
>> Backport of [JDK-8305728](https://bugs.openjdk.org/browse/JDK-8305728). The original patch cannot be directly applied because jdk17u has no [JDK-8299089](https://bugs.openjdk.org/browse/JDK-8299089) and [JDK-8301995](https://bugs.openjdk.org/browse/JDK-8301995).
>> 
>> Testing:
>> - tier1-3 tests on QEMU-System w/ and w/o UseZbs (release build)
>> - tier1-3 tests on unmatched board w/o UseZbs (release build)
>
> src/hotspot/cpu/riscv/macroAssembler_riscv.cpp line 534:
> 
>> 532: 
>> 533:   // Test for jweak tag.
>> 534:   test_bit(t0, value, exact_log2(JNIHandles::weak_tag_mask));
> 
> I don't think this is a single-bit testing, right?

Thanks for the review! I think this is a single-bit testing and `JNIHandles::weak_tag_mask` is defined here:
https://github.com/openjdk/riscv-port-jdk17u/blob/cc8f3f9e84f7c926f1a793651c001cc5b3f945c9/src/hotspot/share/runtime/jniHandles.hpp#L70-L72

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PR Review Comment: https://git.openjdk.org/riscv-port-jdk17u/pull/65#discussion_r1213856476