[riscv-port-jdk17u:riscv-port] RFR: 8296448: RISC-V: Fix temp usages of heapbase register killed by MacroAssembler::en/decode_klass_not_null [v2]

[Dingli Zhang]

On Mon, 13 Mar 2023 02:05:47 GMT, Fei Yang <fyang at openjdk.org> wrote:

>> Dingli Zhang has updated the pull request incrementally with one additional commit since the last revision:
>> 
>>   Fix the access_store_at parameter
>
> src/hotspot/cpu/riscv/macroAssembler_riscv.hpp line 191:
> 
>> 189:                       Address src, Register tmp1, Register thread_tmp);
>> 190:   void access_store_at(BasicType type, DecoratorSet decorators, Address dst,
>> 191:                        Register val, Register tmp1, Register tmp2, Register tmp3);
> 
> I think we should not touch 'access_store_at' here?

Oh sorry, I confused the other branches here when rebase. By the way, the correct code was used when testing.

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PR: https://git.openjdk.org/riscv-port-jdk17u/pull/12