RFR: 8267125: AES Galois CounterMode (GCM) interleaved implementation using AVX512 + VAES instructions [v8]

[Andrew Haley]

On Mon, 9 Aug 2021 15:49:07 GMT, Smita Kamath <svkamath at openjdk.org> wrote:

>> I would like to submit AES-GCM optimization for x86_64 architectures supporting AVX3+VAES (Evex encoded AES). This optimization interleaves AES and GHASH operations.
>> Performance gain of ~1.5x - 2x for message sizes 8k and above.
>
> Smita Kamath has updated the pull request incrementally with one additional commit since the last revision:
> 
>   rewiew update

src/hotspot/cpu/x86/macroAssembler_x86_aes.cpp line 1682:

> 1680:     vpshufb(AAD_HASHx, AAD_HASHx, xmm24, Assembler::AVX_128bit);
> 1681: 
> 1682:     // Compute #rounds for AES based on the length of the key array

This is a bit of a hack. Wouldn't it make more sense to pass in the array oop, then derive both the length and the address of the base of the key array from the oop, rather than using a negative offset from the base address?

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PR: https://git.openjdk.java.net/jdk/pull/4019