RFR: Store verification

[Roland Westrelin]

> I have not yet implemented store-checks in x86_64.ad yet, because I
> couldn't figure out how/where to insert the necessary MacroAssembler
> calls. Roland: maybe you could have a look?

Below is an example of how I think you would do in x86_64.ad

Also it seems you got some conditions wrong.

Roland.

diff --git a/src/cpu/x86/vm/macroAssembler_x86.cpp b/src/cpu/x86/vm/macroAssembler_x86.cpp
--- a/src/cpu/x86/vm/macroAssembler_x86.cpp
+++ b/src/cpu/x86/vm/macroAssembler_x86.cpp
@@ -6123,7 +6123,7 @@
 }
 
 void MacroAssembler::_shenandoah_store_addr_check(Register dst, const char* msg, const char* file, int line) {
-  if (! UseShenandoahGC && ! ShenandoahStoreCheck) return;
+  if (! UseShenandoahGC || ! ShenandoahStoreCheck) return;
   if (dst == rsp) return; // Stack-based target
 
   Register raddr = r9;
@@ -6169,7 +6169,7 @@
 }
 
 void MacroAssembler::_shenandoah_store_check(Register dst, Register value, const char* msg, const char* file, int line) {
-  if (! UseShenandoahGC && ! ShenandoahStoreCheck) return;
+  if (! UseShenandoahGC || ! ShenandoahStoreCheck) return;
   if (dst == rsp) return; // Stack-based target
 
   Register raddr = r8;
diff --git a/src/cpu/x86/vm/x86_64.ad b/src/cpu/x86/vm/x86_64.ad
--- a/src/cpu/x86/vm/x86_64.ad
+++ b/src/cpu/x86/vm/x86_64.ad
@@ -2693,6 +2693,15 @@
                    RELOC_DISP32);
   %}
 
+  enc_class shenandoah_store_check(memory mem, any_RegP src) %{
+    MacroAssembler _masm(&cbuf);
+    __ shenandoah_store_check($mem$$Address, $src$$Register);
+  %}
+
+  enc_class shenandoah_store_addr_check(memory mem) %{
+    MacroAssembler _masm(&cbuf);
+    __ shenandoah_store_addr_check($mem$$Address);
+  %}
 %}
 
 
@@ -5665,7 +5674,7 @@
   ins_cost(125); // XXX
   format %{ "movl    $mem, $src\t# int" %}
   opcode(0x89);
-  ins_encode(REX_reg_mem(src, mem), OpcP, reg_mem(src, mem));
+  ins_encode(shenandoah_store_addr_check(mem), REX_reg_mem(src, mem), OpcP, reg_mem(src, mem));
   ins_pipe(ialu_mem_reg);
 %}
 
@@ -5689,7 +5698,7 @@
   ins_cost(125); // XXX
   format %{ "movq    $mem, $src\t# ptr" %}
   opcode(0x89);
-  ins_encode(REX_reg_mem_wide(src, mem), OpcP, reg_mem(src, mem));
+  ins_encode(shenandoah_store_check(mem, src), REX_reg_mem_wide(src, mem), OpcP, reg_mem(src, mem));
   ins_pipe(ialu_mem_reg);
 %}