RFR: 8283186: Explicitly pass a third temp register to MacroAssembler::store_heap_oop

[Thomas Schatzl]

On Tue, 15 Mar 2022 15:32:41 GMT, Erik Österlund <eosterlund at openjdk.org> wrote:

>> Hi all,
>> 
>>   can I have reviews for this change that explicitly passes a third temp parameter to `MacroAssembler::store_heap_oop` so that `G1BarrierSetAssembler::oop_store_at` (and the equivalent Shenandoah code) does not need to invent some out of thin air? This makes the code much less surprising.
>> 
>> The interesting part of this change is probably the first hunk in `src/hotspot/cpu/x86/templateTable_x86.cpp`, the rest is just passing on that additional parameter.
>> 
>> Testing: gha
>> 
>> Thanks,
>>   Thomas
>
> Looks awesome.

Thanks @fisk for your review

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PR: https://git.openjdk.java.net/jdk/pull/7820