Integrated: 8283186: Explicitly pass a third temp register to MacroAssembler::store_heap_oop

[Thomas Schatzl]

On Tue, 15 Mar 2022 15:20:02 GMT, Thomas Schatzl <tschatzl at openjdk.org> wrote:

> Hi all,
> 
>   can I have reviews for this change that explicitly passes a third temp parameter to `MacroAssembler::store_heap_oop` so that `G1BarrierSetAssembler::oop_store_at` (and the equivalent Shenandoah code) does not need to invent some out of thin air? This makes the code much less surprising.
> 
> The interesting part of this change is probably the first hunk in `src/hotspot/cpu/x86/templateTable_x86.cpp`, the rest is just passing on that additional parameter.
> 
> Testing: gha
> 
> Thanks,
>   Thomas

This pull request has now been integrated.

Changeset: e709cb05
Author:    Thomas Schatzl <tschatzl at openjdk.org>
URL:       https://git.openjdk.java.net/jdk/commit/e709cb05dcf67462f266c1f3dae30976b562676d
Stats:     58 lines in 16 files changed: 2 ins; 2 del; 54 mod

8283186: Explicitly pass a third temp register to MacroAssembler::store_heap_oop

Reviewed-by: eosterlund

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PR: https://git.openjdk.java.net/jdk/pull/7820