RFR: 8293351: Add second tmp register to aarch64 BarrierSetAssembler::load_at [v2]

[Fei Yang]

On Tue, 6 Sep 2022 06:35:13 GMT, Axel Boldt-Christmas <aboldtch at openjdk.org> wrote:

>> "As resolve_weak_handle may call into the VM r11 may still be clobbered. "
>> -- I don't quite understand this.  If this is the case, shouldn't r11 be saved & restored immediate before and after the VM call together with other live caller-save registers?
>
> Maybe? Actually looking at it a second time it seems like r0-r7 and r9-r17 are pushed to the stack at the vm call I was looking at. 
> I am probably missing something. I do not fully understand the reason for pushing the registers at this point, not earlier or later. Would have to investigate further. I do however think that such a change belongs to a separate issue/PR. This PR should not change the instruction emission, only which registers are used.

I think the reason is that register r11 was used as temp register (and thus gets clobbered) by resolve_weak_handle previously. That's why this register was saved/restored here. But this has changed since it not used here anymore with your change. I am OK if you want to handle that in another PR. Just reminds. Thanks.

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PR: https://git.openjdk.org/jdk/pull/10161