RFR: 8320807: [PPC64][ZGC] C1 generates wrong code for atomics

[Martin Doerr]

On Mon, 27 Nov 2023 21:52:53 GMT, Martin Doerr <mdoerr at openjdk.org> wrote:

> Debugging test failures on PPC64 in java/lang/Thread/virtual/stress/Skynet.java#ZGenerational has shown that the ldarx+stdcx_ loop for uncompressed Oops in `LIR_Assembler::atomic_op` is wrong: `__ mr(Rtmp, Robj);` is inside of the ldarx+stdcx_ loop, but must be outside of it. Repeated execution leads to wrong store value.
> In addition, zBarrierSetC1.cpp expects `cas_obj` and `xchg` to contain all necessary memory barriers. That doesn't fit to the current PPC64 design which inserts memory barriers on LIR level instead. I've changed this and moved them into the assembler code for all GCs.
> While debugging, I have optimized out an unnecessary branch in `ZBarrierSetAssembler::store_barrier_medium`.

Thanks for the reviews! I've improved the comments as suggested.

-------------

PR Comment: https://git.openjdk.org/jdk/pull/16835#issuecomment-1836106556