RFR: 8320807: [PPC64][ZGC] C1 generates wrong code for atomics

[Martin Doerr]

Debugging test failures on PPC64 in java/lang/Thread/virtual/stress/Skynet.java#ZGenerational has shown that the ldarx+stdcx_ loop for uncompressed Oops in `LIR_Assembler::atomic_op` is wrong: `__ mr(Rtmp, Robj);` is inside of the ldarx+stdcx_ loop, but must be outside of it. Repeated execution leads to wrong store value.
In addition, zBarrierSetC1.cpp expects `cas_obj` and `xchg` to contain all necessary memory barriers. That doesn't fit to the current PPC64 design which inserts memory barriers on LIR level instead. I've changed this and moved them into the assembler code for all GCs.
While debugging, I have optimized out an unnecessary branch in `ZBarrierSetAssembler::store_barrier_medium`.

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Commit messages:
 - [PPC64][ZGC] C1 generates wrong code for atomics

Changes: https://git.openjdk.org/jdk/pull/16835/files
 Webrev: https://webrevs.openjdk.org/?repo=jdk&pr=16835&range=00
  Issue: https://bugs.openjdk.org/browse/JDK-8320807
  Stats: 121 lines in 4 files changed: 42 ins; 70 del; 9 mod
  Patch: https://git.openjdk.org/jdk/pull/16835.diff
  Fetch: git fetch https://git.openjdk.org/jdk.git pull/16835/head:pull/16835

PR: https://git.openjdk.org/jdk/pull/16835