RFR: JDK-8241503: C2: Share MacroAssembler between mach nodes during code emission [v4]

[Hao Sun]

On Wed, 29 Nov 2023 22:40:35 GMT, Cesar Soares Lucas <cslucas at openjdk.org> wrote:

>> # Description
>> 
>> Please review this PR with a patch to re-use the same C2_MacroAssembler object to emit all instructions in the same compilation unit.
>> 
>> Overall, the change is pretty simple. However, due to the renaming of the variable to access C2_MacroAssembler, from `_masm.` to `masm->`, and also some method prototype changes, the patch became quite large.
>> 
>> # Help Needed for Testing
>> 
>> I don't have access to all platforms necessary to test this. I hope some other folks can help with testing on `S390`, `RISC-V` and `PPC`.
>> 
>> # Testing status
>> 
>> ## tier1
>> 
>> |          |   Win   |   Mac   |  Linux  |
>> |----------|---------|---------|---------|
>> | ARM64    |         |         |         |
>> | ARM32    |         |         |         |
>> | x86      |         |         |         |
>> | x64      |         |         |         |
>> | PPC64    |         |         |         |
>> | S390x    |         |         |         |
>> | RiscV    |         |         |         |
>
> Cesar Soares Lucas has updated the pull request with a new target base due to a merge or a rebase. The pull request now contains five commits:
> 
>  - Fix merge
>  - Catch up with master branch.
>    
>    Merge remote-tracking branch 'origin/master' into reuse-macroasm
>  - Some inst_mark fixes; Catch up with master.
>  - Catch up with changes on master
>  - Reuse same C2_MacroAssembler object to emit instructions.

We should update the copyright year for the following files:


src/hotspot/cpu/aarch64/gc/x/x_aarch64.ad
src/hotspot/cpu/arm/arm_32.ad
src/hotspot/cpu/ppc/gc/x/x_ppc.ad
src/hotspot/cpu/riscv/gc/x/x_riscv.ad
src/hotspot/cpu/x86/c2_intelJccErratum_x86.hpp
src/hotspot/cpu/x86/gc/x/x_x86_64.ad
src/hotspot/cpu/x86/x86_32.ad
src/hotspot/share/opto/c2_CodeStubs.hpp
src/hotspot/share/opto/constantTable.hpp

src/hotspot/cpu/aarch64/aarch64.ad line 2829:

> 2827:   enc_class aarch64_enc_ldrsbw(iRegI dst, memory1 mem) %{
> 2828:     Register dst_reg = as_Register($dst$$reg);
> 2829:     loadStore(masm, &MacroAssembler::ldrsbw, dst_reg, $mem->opcode(),

The block of code should be auto-generated by `ad_encode.m4` file. 
We'd better not edit these lines directly. Instead, we should update the m4 file accordingly.

src/hotspot/cpu/aarch64/aarch64_vector.ad line 122:

> 120:       }
> 121:       int imm4 = disp / mesize / Matcher::scalable_vector_reg_size(vector_elem_bt);
> 122:       (masm->*insn)(reg, Assembler::elemType_to_regVariant(vector_elem_bt), pg, Address(base, imm4));

this update is missing in the corresponding `aarch64_vector_ad.m4` file.
(that is, there is a mismatch between the ad file and the generated one.)

-------------

PR Review: https://git.openjdk.org/jdk/pull/16484#pullrequestreview-1756986982
PR Review Comment: https://git.openjdk.org/jdk/pull/16484#discussion_r1410387066
PR Review Comment: https://git.openjdk.org/jdk/pull/16484#discussion_r1410381293