RFR: 8338881: GenShen: Use explicit third temp register for post barrier

[William Kemper]

* Use register given as `tmp3` argument instead of "out of the blue" `r3`
* Simplify logic for post barrier call

## Testing
GHA, internal pipelines

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Commit messages:
 - Simplify post barrier

Changes: https://git.openjdk.org/shenandoah/pull/486/files
  Webrev: https://webrevs.openjdk.org/?repo=shenandoah&pr=486&range=00
  Issue: https://bugs.openjdk.org/browse/JDK-8338881
  Stats: 19 lines in 1 file changed: 5 ins; 13 del; 1 mod
  Patch: https://git.openjdk.org/shenandoah/pull/486.diff
  Fetch: git fetch https://git.openjdk.org/shenandoah.git pull/486/head:pull/486

PR: https://git.openjdk.org/shenandoah/pull/486