RFR: 8339643: Port JEP 404 to RISC-V [v2]

[Fei Yang]

On Thu, 12 Sep 2024 23:50:43 GMT, Kelvin Nilsen <kdnilsen at openjdk.org> wrote:

>> Fei Yang has updated the pull request incrementally with one additional commit since the last revision:
>> 
>>   Review
>
> src/hotspot/cpu/riscv/gc/shenandoah/shenandoahBarrierSetAssembler_riscv.cpp line 579:
> 
>> 577:   __ bind(L_loop);
>> 578:   __ add(tmp, start, count);
>> 579:   __ sb(zr, Address(tmp));
> 
> Do we want to condition behavior on UseCondCardMark?  Other architectures are considering this.

Seems still under discussion? I will provide further update once it's resolved.

> src/hotspot/share/gc/shenandoah/mode/shenandoahGenerationalMode.cpp line 36:
> 
>> 34: 
>> 35: #if !(defined AARCH64 || defined AMD64 || defined IA32 || defined PPC64 || RISCV64)
>> 36:   vm_exit_during_initialization("Shenandoah Generational GC is not supported on this platform.");
> 
> Should RISCV64 use the same style of macro test as the other architectures?  "|| defined RISCV64"

Good catch. I think it's mis-typed. Fixed. Thank you.

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PR Review Comment: https://git.openjdk.org/shenandoah/pull/493#discussion_r1758138170
PR Review Comment: https://git.openjdk.org/shenandoah/pull/493#discussion_r1758137439