[aarch64-port-dev ] RFR: 8216557 Aarch64: Add support for Concurrent Class Unloading

Stuart Monteith stumon01 at arm.com
Fri Mar 27 15:35:30 UTC 2020

Thanks Andrew,

I'll change that round. The code verifying the barrier would catch any change
there anyway.

On 27/03/2020 12:36, Andrew Haley wrote:
> On 3/26/20 10:42 PM, Stuart Monteith wrote:
>>         BarrierSetAssembler::nmethod_entry_barrier
>>         This method emits the barrier code. In internal review it was suggested
>> the "dmb( ISHLD )" should be replaced by "membar(LoadLoad)". I've not
>> done this as the BarrierSetNMethod code checks the exact instruction
>> sequence, and I prefer to be explicit.
> I understand, but LoadLoad is the semantics you need, and it's more important
> to say that. The mere existence of verification code shouldn't determine
> how you express the runtime code.
> I'll do a thorough review later.

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