RFR: 8321001: RISC-V: C2 SignumVF

[Vladimir Kempik]

On Fri, 1 Dec 2023 15:24:35 GMT, Hamlin Li <mli at openjdk.org> wrote:

> Hi,
> Can you review the patch to add intrinisc SignumVF/SignumVD on riscv?
> Thanks
> 
> ## Test
> test/hotspot/jtreg/compiler/intrinsics/
> test/hotspot/jtreg/compiler/vectorapi/
> and tests found via:
> grep -nr test/hotspot/jtreg/ -we Math.signum
> and test found via:
> grep -nr test/jdk/ -we Math.signum

src/hotspot/cpu/riscv/c2_MacroAssembler_riscv.cpp line 1681:

> 1679: void C2_MacroAssembler::signum_fp_v(VectorRegister dst, BasicType bt, int vlen,
> 1680:                                     VectorRegister zero, VectorRegister one) {
> 1681:   vsetvli_helper(bt, vlen);

Can we have a situation where vlen times sew(bt) won't fit into h/w register ?

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PR Review Comment: https://git.openjdk.org/jdk/pull/16925#discussion_r1413434154