RFR: 8320280: RISC-V: Avoid passing t0 as temp register to MacroAssembler::lightweight_lock/unlock [v2]
Gui Cao
gcao at openjdk.org
Mon Nov 20 09:41:02 UTC 2023
On Mon, 20 Nov 2023 07:49:27 GMT, Robbin Ehn <rehn at openjdk.org> wrote:
> Hi, thanks, looks good, but if 'temp'/'scratch' is not suppose to be t0, why not assert this in the 'callees' ?
>
> E.g. in C2_MacroAssembler::fast_lock this assert: assert_different_registers(oop, box, tmp, disp_hdr, t0); needs to updated with tmp3Reg. Other 'callee' have no asserts.
@robehn Thanks for your review, I have updated several assertions for calls to MacroAssembler::lightweight_lock/unlock.
-------------
PR Comment: https://git.openjdk.org/jdk/pull/16703#issuecomment-1818632545
More information about the hotspot-compiler-dev
mailing list