RFR: 8286301: Port JEP 425 to RISC-V [v2]

[Feilong Jiang]

On Wed, 2 Nov 2022 10:13:36 GMT, Xiaolin Zheng <xlinzheng at openjdk.org> wrote:

>> src/hotspot/cpu/riscv/sharedRuntime_riscv.cpp line 979:
>> 
>>> 977: 
>>> 978:     // Make sure the call is patchable
>>> 979:     __ align(NativeInstruction::instruction_size);
>> 
>> alignment was also done in `emit_trampoline_stub`, do we still need this `align` before emitting a trampoline call?
>
> Maybe I can help to answer this question.
> 
> This is an RVC-related change.
> We want the `call site` itself, which is the `jal` instruction, to be aligned to be patchable, for RVC can make it 2-byte aligned.
> 
> [code seg]
>     ...
>     jal <trampoline start addr>      <---   we are here, and want to force aligning this call site.
>     ...
> 
> 
> [stub seg]
>     ...
> <trampoline start addr>:
>     auipc
>     ld
>     jalr
>     [64-bit real address]    <-  this is certainly aligned to 8, as you've mentioned.
>     ...

Looks reasonable. As you mentioned that it‘s an RVC-related change, do we need this alignment when `UseRVC` is disabled?

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PR: https://git.openjdk.org/jdk/pull/10917