RFR: 8315841: RISC-V: Check for hardware TSO support [v4]

[Vladimir Kempik]

On Thu, 7 Sep 2023 12:29:15 GMT, Andrew Haley <aph at openjdk.org> wrote:

>> Ludovic Henry has updated the pull request incrementally with one additional commit since the last revision:
>> 
>>   fixup! 8315841: RISC-V: Check for hardware TSO support
>
> src/hotspot/cpu/riscv/macroAssembler_riscv.hpp line 392:
> 
>> 390:     Assembler::fence(predecessor, successor);
>> 391:   }
>> 392: 
> 
> Suggestion:
> 
>   void fence(uint32_t predecessor, uint32_t successor) {
>     if (UseZtso) {
>       if (pred_succ_to_membar_mask(predecessor, successor) & StoreLoad) {
>         // TSO allows for stores to be reordered after loads. When the compiler
>         // generates a fence to disallow that, we are required to generate the
>         // fence for correctness.
>         Assembler::fence(predecessor, successor);
>       } else {
>         // TSO guarantees other orderings already.
>       }
>     }
>   }

@theRealAph this way we will miss fence completely when UseZtso is false

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PR Review Comment: https://git.openjdk.org/jdk/pull/15613#discussion_r1318541727