RFR: 8320069: RISC-V: Add Zcb instructions [v3]

[Robbin Ehn]

On Wed, 3 Jan 2024 06:56:21 GMT, Fei Yang <fyang at openjdk.org> wrote:

> Seems fine. I only have some minor comments.

Thank you!

> src/hotspot/cpu/riscv/assembler_riscv.hpp line 2962:
> 
>> 2960:   }
>> 2961: 
>> 2962:   // Format CU, c.[sz]ext.*, c.no
> 
> Nit: s/c.no/c.not/

Fixed

> src/hotspot/cpu/riscv/macroAssembler_riscv.hpp line 497:
> 
>> 495:   inline void zext_b(Register Rd, Register Rs) {
>> 496:     if (do_compress_zcb(Rd, Rs) &&
>> 497:         (Rd == Rs)) {
> 
> Nit: Maybe put the two conditions on the same line to be consistent in style with the other two `notr` & `zext_w` in the same file.
> `if (do_compress_zcb(Rd, Rs) && (Rd == Rs)) {`

Fixed

-------------

PR Comment: https://git.openjdk.org/jdk/pull/17122#issuecomment-1878400415
PR Review Comment: https://git.openjdk.org/jdk/pull/17122#discussion_r1442683177
PR Review Comment: https://git.openjdk.org/jdk/pull/17122#discussion_r1442682874