RFR: 8345298: RISC-V: Add riscv backend for Float16 operations - scalar [v5]

[Hamlin Li]

On Tue, 11 Mar 2025 00:48:04 GMT, Fei Yang <fyang at openjdk.org> wrote:

>> In fact, in my mind the order should be FH->F->D, considering the width changing from 16->32->64.
>
> That's also fine to me. Just expecting a consistent order for other definitions as well like `immHF0` -> `immF0` -> `immD0` (and `immHF` -> `immF` -> `immD`).

The orders in original code are inconsistent, e.g. for `operand` it's immD -> immF, for `instruct` it's loadConF -> loadConD, this patch just follow the previous local order.

And I think this inconsistency is not a problem, because when we read the code, as long as it maintains a certain order locally, then there is no problem, we don't have to enforce global consistency because it is difficult to do so and there doesn't seem to be much benefit.

> That said, it doesn't seem that it could happen for this HF part?

No, seems not for now.

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PR Review Comment: https://git.openjdk.org/jdk/pull/23844#discussion_r1988795670
PR Review Comment: https://git.openjdk.org/jdk/pull/23844#discussion_r1988795542