[riscv-port] RFR: 8278644: riscv: Intrinsify mulAdd [v2]

[Feilong Jiang]

On Tue, 21 Dec 2021 08:41:46 GMT, Fei Yang <fyang at openjdk.org> wrote:

>> Feilong Jiang has updated the pull request incrementally with one additional commit since the last revision:
>> 
>>   change the type of i in for loop to match the type of unroll
>
> src/hotspot/cpu/riscv/macroAssembler_riscv.cpp line 3062:
> 
>> 3060:   blt(len, tmp, L_tail_loop);
>> 3061:   bind(L_unroll);
>> 3062:   for (unsigned i = 0; i < unroll; i++) {
> 
> Better to change type of "i" into signed, i.e., "for (int i = 0; i < unroll; i++)"

Thanks, the type of `i` is the same as `unroll` now.

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PR: https://git.openjdk.java.net/riscv-port/pull/36