[riscv-port] RFR: 8278644: riscv: Intrinsify mulAdd [v2]

[Fei Yang]

On Tue, 21 Dec 2021 09:01:33 GMT, guotaiping1 <duke at openjdk.java.net> wrote:

>> src/hotspot/cpu/riscv/macroAssembler_riscv.cpp line 3049:
>> 
>>> 3047:                              Register len, Register k, Register tmp) {
>>> 3048:   Label L_tail_loop, L_unroll, L_end;
>>> 3049:   mv(tmp, out);
>> 
>> I think this "mv" instruction could be moved after the zero check for"len". Then we will save one instruction when "len" is zero.
>
> Thanks for your review, but if the `mv(tmp, out)` instruction is moved after `beqz(len, L_end)`, the `tmp` in `add(offset, tmp, t0)` is not as expected because of the `mv(out, zr)` before `beqz(len, L_end)`.

Yes, you are right. I didn't notice that.

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PR: https://git.openjdk.java.net/riscv-port/pull/36