[riscv-port] Integrated: 8279346: riscv: Unnecessary sign extension in BigInteger intrinsics

[Yanhong Zhu]

On Fri, 31 Dec 2021 09:13:47 GMT, Yanhong Zhu <yzhu at openjdk.org> wrote:

> Reference: https://github.com/riscv-non-isa/riscv-elf-psabi-doc
> 
> " Scalars that are at most XLEN bits wide are passed in a single argument register, or on the stack by value if none is available.
> When passed in registers or on the stack, integer scalars narrower than XLEN bits are widened according to the sign of their type up to 32 bits, then sign-extended to XLEN bits.
> When passed in registers or on the stack, floating-point types narrower than XLEN bits are widened to XLEN bits, with the upper bits undefined."
> 
> So there is no need to do sign extension for signed integer input parameters.
> 
> Performed full jtreg tests with qemu without new failures.

This pull request has now been integrated.

Changeset: e73db5d3
Author:    Yanhong Zhu <yzhu at openjdk.org>
Committer: Fei Yang <fyang at openjdk.org>
URL:       https://git.openjdk.java.net/riscv-port/commit/e73db5d332f4d69261d0c92817d4e839a7ac71c1
Stats:     41 lines in 4 files changed: 4 ins; 8 del; 29 mod

8279346: riscv: Unnecessary sign extension in BigInteger intrinsics

Reviewed-by: fyang

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PR: https://git.openjdk.java.net/riscv-port/pull/40