[riscv-port] RFR: 8279344: riscv: RVB: Add bitwise rotation instructions [v9]

[Fei Yang]

On Tue, 4 Jan 2022 07:07:23 GMT, Feilong Jiang <fjiang at openjdk.org> wrote:

>> This PR implements bitwise instructions of RISC-V BitManipulation Extension, including ror/rolw/ror/rori/roriw/rorw. New C2 instructions are covered by following JTREG tests:
>> - test/hotspot/jtreg/compiler/intrinsics/TestRotate.java
>> - test/jdk/java/lang 
>> 
>> This PR also add zext/bext C2 instructions that were missed in JDK-8279213
>> 
>> Hotspot and jdk tier1 test on QEMU (enable RVB) are passed without new failures.
>
> Feilong Jiang has updated the pull request incrementally with one additional commit since the last revision:
> 
>   rename some instruct to match its match rule

Looks good. Thanks.

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Marked as reviewed by fyang (Lead).

PR: https://git.openjdk.java.net/riscv-port/pull/39