[riscv-port] Integrated: 8279827: riscv: RVB: Add shift and add instructions

[Feilong Jiang]

On Tue, 11 Jan 2022 07:18:10 GMT, Feilong Jiang <fjiang at openjdk.org> wrote:

> This PR implements shift left and add instructions: `sh1add`/`sh2add`/`sh3add`/`sh1add.uw`/`sh2add.uw`/`sh3add.uw`.
> 
> New C2 instructions are covered by JTREG test: test/jdk/java/lang
> 
> Hotspot and jdk tier1 tests on QEMU (with and without UseRVB) are passed without new failures.

This pull request has now been integrated.

Changeset: 67049937
Author:    Feilong Jiang <fjiang at openjdk.org>
Committer: Fei Yang <fyang at openjdk.org>
URL:       https://git.openjdk.java.net/riscv-port/commit/67049937130f1796d2625c44b4e64d67ce08dc96
Stats:     368 lines in 14 files changed: 119 ins; 107 del; 142 mod

8279827: riscv: RVB: Add shift and add instructions

Reviewed-by: fyang, yzhu

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PR: https://git.openjdk.java.net/riscv-port/pull/43