[riscv-port] RFR: 8280497: riscv: Undefined Behaviour in class Assembler

Yadong Wang yadongwang at openjdk.java.net
Wed Jan 26 05:34:19 UTC 2022


The same problem exists on the riscv platfom. So we follow https://bugs.openjdk.java.net/browse/JDK-8276563.

All instances of type Register exhibit UB in the form of wild pointer (including null pointer) dereferences. This isn't very hard to fix: we should make Registers pointer to something rather than aliases of small integers.

Hotspot/jdk tier1 were passed on the unmatched board. And all jtreg tests have been tested on Qemu without new failures.

-------------

Commit messages:
 - 8280497: riscv: Undefined Behaviour in class Assembler

Changes: https://git.openjdk.java.net/riscv-port/pull/53/files
 Webrev: https://webrevs.openjdk.java.net/?repo=riscv-port&pr=53&range=00
  Issue: https://bugs.openjdk.java.net/browse/JDK-8280497
  Stats: 137 lines in 8 files changed: 51 ins; 16 del; 70 mod
  Patch: https://git.openjdk.java.net/riscv-port/pull/53.diff
  Fetch: git fetch https://git.openjdk.java.net/riscv-port pull/53/head:pull/53

PR: https://git.openjdk.java.net/riscv-port/pull/53


More information about the riscv-port-dev mailing list