[riscv-port-jdk17u:riscv-port] Integrated: 8308997: RISC-V: Sign extend when comparing 32-bit value with zero instead of testing the sign bit

[Gui Cao]

On Mon, 5 Jun 2023 06:42:36 GMT, Gui Cao <gcao at openjdk.org> wrote:

> Hi,
> Please help review this backport to riscv-port-jdk17u.
> Backport of [JDK-8308997](https://bugs.openjdk.org/browse/JDK-8308997). 
> Because there is no [JDK-8294100](https://bugs.openjdk.org/browse/JDK-8294100), [JDK-8301496](https://bugs.openjdk.org/browse/JDK-8301496) here in riscv-port-jdk17u, it will show not clean.
> 
> Testing:
> 
> Tier1-3 passed without new failure on unmacthed (release).

This pull request has now been integrated.

Changeset: 0c31ef4f
Author:    Gui Cao <gcao at openjdk.org>
Committer: Fei Yang <fyang at openjdk.org>
URL:       https://git.openjdk.org/riscv-port-jdk17u/commit/0c31ef4faa836bfd585d135be273d961d2966aae
Stats:     58 lines in 9 files changed: 0 ins; 14 del; 44 mod

8308997: RISC-V: Sign extend when comparing 32-bit value with zero instead of testing the sign bit

Reviewed-by: fyang
Backport-of: 119994f3cedab26caa7244e49b58ab6b0b942d91

-------------

PR: https://git.openjdk.org/riscv-port-jdk17u/pull/67